Semiconductor Engineering

Ensuring ESD Protection Verification With Industry-Standard Checks

Electronic design automation (EDA) verification of electrostatic discharge (ESD) protection is a complex task. Different integrated circuit (IC) design companies use different ESD protection ...
EDN

Automate ESD protection verification for complex ICs

Designing an integrated circuit (IC) for communication, computing, gaming, and other emerging applications is a multi-million dollar project, requiring rigorous design methodology and substantial ...
Semiconductor Engineering

ESD P2P And CD Verification Doesn’t Have To Be Hard

As a designer or verification engineer, you’re fighting the effects of electrostatic discharge (ESD) in your integrated circuit (IC) designs all the time. ESD is one of those frustrating issues that ...
Electronic Design

Automated ESD protection verification for 2.5D and 3D ICs

2.5D/3D IC designs present new challenges in both ESD design and verification. Advanced automated ESD verification methodology accurately and effectively evaluates ESD protection in 2.5/3D IC designs.
EDN

Transistor level ESD verification in large SoC designs

When it comes to large system-on-chip (SoC) designs, there is a need for a comprehensive electrostatic discharge (ESD) verification flow that can verify both topological and geometrical constructions ...
Business Wire

Apache Introduces PathFinder, the Industry’s First Full-chip ESD Physical Integrity Solution

SAN JOSE, Calif.--(BUSINESS WIRE)--Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced PathFinder™, a ...