I’m not talking about carnival funhouse mirrors, but rather the different options for mirroring symbols, vias, and bond fingers in your IC Package layout. The Allegro Package Designer Plus and SiP ...

For many applications, next generation IC packaging is the best path to achieve silicon scaling, functional density, and heterogeneous integration while reducing the overall package size.

In today’s ever-shrinking IC package design cycles, it is almost imperative that we catch and correct routing issues as early as possible, which makes simulation an integral part of the design cycle.