EDN

Silicon Frontline enhances post-layout verification tools

PARIS — Startup Silicon Frontline Technology, Inc. has introduced the latest versions of its products for post-layout verification: F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D ...
Semiconductor Engineering

System-Level, Post-Layout Electrical Analysis For High-Density Advanced Packaging

As HDAP designs become more popular, the need for post-layout simulation (analog) and post-layout STA (digital) flows to augment basic physical verification (DRC and LVS) is growing. Mentor provides ...
EDN

Silicon Frontline Technology’s first tools verify IC post layout

Startup Silicon Frontline Technology, Inc. has anounced its first products for post-layout verification: F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of ...
Semiconductor Engineering

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification

My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers ...
Business Wire

Concept Engineering Improves Its Customizable Debugging Platform for Mixed-Signal, Digital, Analog, and Post-Layout Design

FREIBURG, Germany--(BUSINESS WIRE)--Concept Engineering, leaders in visualization and debugging technology for electronic circuits and systems, will unveil version 6.9 of the company's popular Vision ...
Morningstar

Alps Alpine Adopts Silvaco’s Jivaro Pro to Accelerate SPICE Post-Layout Simulation

We expect to see a substantial improvement in engineering productivity as post-layout simulation times have been significantly reduced for many blocks, accelerating our overall timeline”, said ...