Design-Reuse

Design Compiler 2010 Doubles Productivity of Synthesis and Place and Route

MOUNTAIN VIEW, Calif., March 29, 2010 -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced Design Compiler® ...
Electronic Design

ASIC-Style Synthesis Embarks On FPGA World

With as many as 40% of ASIC and ASSP designers doing FPGA prototyping, Synopsys decided to spin a version of its Design Compiler (DC) synthesis tool for FPGA designers. The new tool, dubbed DC FPGA, ...
Electronic Design

FPGA Prototyping Tool Aligns With ASIC Flow

This FPGA-Synthesis Tool Offers The Prototyping Capabilities Required By RF-Intensive Systems And A Migration Path To ASIC Product Design. Over a third of all high-end ASIC designers now use FPGAs for ...
Nasdaq

Samsung Foundry Certifies Synopsys Design Compiler NXT for 5/4nm FinFET Process Technologies

Customers adopting Design Compiler NXT report significant reduction in runtimes together with improvements in power, performance and area (PPA) New advanced optimizations, such as concurrent clock and ...
EDN

‘Concurrent’ IC design suite rolls

Santa Clara, Calif. — Proclaiming the “next generation” in IC physical design, Synopsys Inc. last week rolled out IC Compiler, which concurrently runs physical synthesis, clock tree synthesis, ...
Design-Reuse

Synopsys Extends Synthesis Leadership with Next-Generation Design Compiler

MOUNTAIN VIEW, Calif., Nov 6, 2018 -- Synopsys, Inc. (Nasdaq: SNPS) today announced Design Compiler ® NXT, the latest innovation in the Design Compiler family of RTL Synthesis products, extending the ...